Title : 
Buffered stack memory organisation
         
        
            Author : 
Rajaraman, V. ; Vikas, O.
         
        
            Author_Institution : 
Indian Institute of Technology, Computer Science & Electrical Engineering, Kanpur, India
         
        
        
        
        
        
        
            Abstract : 
Slow unidirectional shift registers can be used to realise a large-size inexpensive stack. A simple configuration of such a shift-register stack will frequently force a processing unit needing access to it into an idle state. In the letter, a scheme using a small number of fast bidirectional shift registers appended to a unidirectional shift-register stack is suggested. This configuration makes the entire stack look, for most of the time, as if it were made of fast bidirectional shift registers. A design method is presented to determine the number of bits needed in the bidirectional shift register to meet given specifications.
         
        
            Keywords : 
file organisation; shift registers; buffered stack memory organisation; fast bidirectional shift registers; unidirectional shift registers;
         
        
        
            Journal_Title : 
Electronics Letters
         
        
        
        
        
            DOI : 
10.1049/el:19750231