Title :
Switched-capacitor implementations of phase-locked loops
Author :
Mulawka, J.J. ; Pakulak, A.
Author_Institution :
Technical University of Warsaw, Institute of Electronics Fundamentals, Warsaw, Poland
fDate :
12/1/1984 12:00:00 AM
Abstract :
Novel configurations of PLL circuits consisting of capacitors, switches and active elements are investigated. Three topologies of phase loops are discussed. The phase loops derived show a number of attractive features. Design examples are provided, and illustrative experimental results are included.
Keywords :
phase-locked loops; switched capacitor networks; PLL circuits; SC networks; active elements; phase loops; phase-locked loops;
Journal_Title :
Electronic Circuits and Systems, IEE Proceedings G
DOI :
10.1049/ip-g-1:19840041
