Title :
Determinacy of computation schemata for both parallel and simultaneous operation
Author_Institution :
Heriot-Watt University, Department of Electrical & Electronic Engineering, Edinburgh, UK
Abstract :
Computation schemata represent the flow of data and control during a parallel computing process. The letter introduces the concept of inhibit branches to the control schema and shows how they may be used to ensure determinacy under simultaneous operating conditions. A determinacy algorithm is presented.
Keywords :
parallel processing; computation schemata; control schema; determinacy algorithm; inhibit branches; parallel computing process; simultaneous operating conditions;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19750376
