• DocumentCode
    929942
  • Title

    Determinacy of computation schemata for both parallel and simultaneous operation

  • Author

    Howard, B.V.

  • Author_Institution
    Heriot-Watt University, Department of Electrical & Electronic Engineering, Edinburgh, UK
  • Volume
    11
  • Issue
    20
  • fYear
    1975
  • Firstpage
    485
  • Lastpage
    486
  • Abstract
    Computation schemata represent the flow of data and control during a parallel computing process. The letter introduces the concept of inhibit branches to the control schema and shows how they may be used to ensure determinacy under simultaneous operating conditions. A determinacy algorithm is presented.
  • Keywords
    parallel processing; computation schemata; control schema; determinacy algorithm; inhibit branches; parallel computing process; simultaneous operating conditions;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19750376
  • Filename
    4236902
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=929942