Title :
A beta model for estimating the testability and coverage distributions of a VLSI circuit
Author :
Farhat, H.A. ; From, S.G.
Author_Institution :
Dept. of Math. & Comput. Sci., Nebraska Univ., Omaha, NE, USA
fDate :
4/1/1993 12:00:00 AM
Abstract :
A relation between fault coverage and testability is employed to predict population coverage. The testability profile is modeled as a mixture of a discrete impulse function and a continuous beta distribution. The parameters of the modeled distribution are estimated from fault coverage data obtained on a sample of faults. The beta distribution is chosen due to its flexible nature. The computed values of the beta parameters are dependent on the distribution of input vectors. Experimental results on three of the large ISCAS-89 circuits reflect the accuracy of the estimated fault coverage. Applications of the presented work include test generation by fault sampling, testability estimation, and test length predictions
Keywords :
VLSI; fault location; integrated circuit testing; integrated logic circuits; logic testing; maximum likelihood estimation; probability; ISCAS-89 circuits; VLSI circuit; beta model; continuous beta distribution; coverage distributions; discrete impulse function; fault coverage; fault coverage data; fault sampling; population coverage; test generation; test length predictions; testability estimation; testability profile; Circuit faults; Circuit simulation; Circuit testing; Distributed computing; Electrical fault detection; Fault detection; Impulse testing; Parameter estimation; Random number generation; Very large scale integration;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
