Title : 
Robust and accurate hierarchical floorplanning with integrated global wiring
         
        
            Author : 
Lengauer, Thomas ; Müller, Rolf
         
        
            Author_Institution : 
German Nat. Res. Center for Comput. Sci., St. Augustin, Germany
         
        
        
        
        
            fDate : 
6/1/1993 12:00:00 AM
         
        
        
        
            Abstract : 
Many popular floorplanning methods are based on circuit partitioning. Besides effectiveness, their main advantages are the easy handling of flexible cells and the ability to incorporate global wiring in a straightforward manner. Several proven approaches to partitioning-based floorplanning and hierarchical global wiring are unified and enhanced with new ideas. The result is a robust algorithmic framework for floorplanning with integrated global wiring that incorporates a new efficient sizing method for cut trees of arbitrary degree, an accurate procedure for wiring area estimation, and a method to select a suitable floorplan topology using a systematic optimization procedure that integrates floorplanning and hierarchical wiring. Experiments with a prototype implementation called the FRODO-system prove the effectiveness of this approach
         
        
            Keywords : 
VLSI; circuit layout CAD; integrated circuit technology; network routing; network topology; optimisation; trees (mathematics); FRODO-system; IC layout; VLSI layout; chip floorplan; circuit partitioning; cut trees; floorplan topology; hierarchical floorplanning; integrated global wiring; optimization procedure; sizing method; wiring area estimation; Circuit topology; Clustering algorithms; Clustering methods; Optimization methods; Partitioning algorithms; Planning; Robustness; Shape; Wiring;
         
        
        
            Journal_Title : 
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on