• DocumentCode
    930462
  • Title

    Saturated Resistor Load for GaAs Integrated Circuits

  • Author

    Lee, Chien-ping ; Welch, Bryant M. ; Zucca, Ricardo

  • Volume
    30
  • Issue
    7
  • fYear
    1982
  • Firstpage
    1007
  • Lastpage
    1013
  • Abstract
    Saturated resistors, two-terminal load devices, have been fabricated and evaluated as pull-up loads for GaAs digital integrated circuits. The saturated resistor loads exhibit superior device characteristics compared with FET active loads. Up to 100-percent improvement in the uniformity of the saturation current has been obtained. Ring oscillators with saturated resistor pull-up loads have shown ~20-percent lower speed-power products than ring oscillators with FET active loads. This superior circuit performance is attributed to 1) no gate capacitance, and 2) less backgating effect. Reliability studies using accelerated aging have shown that circuits are more reliable when saturated resistor loads are used.
  • Keywords
    Circuit optimization; Digital integrated circuits; FETs; Fabrication; Gallium arsenide; Integrated circuit reliability; Logic circuits; Logic devices; Resistors; Ring oscillators;
  • fLanguage
    English
  • Journal_Title
    Microwave Theory and Techniques, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9480
  • Type

    jour

  • DOI
    10.1109/TMTT.1982.1131190
  • Filename
    1131190