DocumentCode :
931384
Title :
A framework to evaluate technology and device design enhancements for MOS integrated circuits
Author :
Sodini, Charles G. ; Wong, S. Simon ; Ko, Ping-Keung
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA
Volume :
24
Issue :
1
fYear :
1989
Firstpage :
118
Lastpage :
127
Abstract :
A hierarchical framework which connects device and technology design parameters to specific circuit applications is presented. The functional circuit blocks which are used in the framework are defined. Examples of the use of this framework for design-intensive circuits are given, and experimental data which show the impact of device design on these circuit applications are presented. Technology-intensive circuit examples are also given which demonstrate the effect of technology enhancements on specific circuit applications.<>
Keywords :
CMOS integrated circuits; circuit CAD; integrated circuit technology; CMOS; MOS integrated circuits; circuit blocks; design-intensive circuits; device design enhancements; experimental data; hierarchical framework; impact of device design; specific circuit applications; technology design parameters; technology enhancements; technology intensive circuit examples; CMOS technology; Circuit optimization; Circuits and systems; Integrated circuit technology; Logic circuits; Logic devices; MOS integrated circuits; Power supplies; Programmable logic arrays;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.16311
Filename :
16311
Link To Document :
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