Title :
Design techniques for a 565/680 Mbit/s coder/decoder
Author :
Wood, I.C. ; Mudd, M.S.J. ; Taylor, D.G. ; Ward, P.J. ; Saul, P.H.
Author_Institution :
Plessey Research (Caswell) Ltd., Allen Clark Research Centre, Towcester, UK
fDate :
3/1/1985 12:00:00 AM
Abstract :
The circuit design, process and layout techniques used to implement a high-performance silicon integrated circuit for a 565 Mbit/s multiplex and optical-fibre transmission system will be described. The IC contains 6000 transistors and operates at speeds well in excess of those normally achieved using semicustom circuit techniques, while retaining the normal advantages of semicustom design methods.
Keywords :
VLSI; codecs; digital integrated circuits; multiplexing equipment; optical fibres; optical links; 565 Mbit/s multiplex; 680 Mbit/s; coder/decoder; decoder demultiplexer; integrated circuit; layout techniques; monolithic IC; multiplexer encoder; optical-fibre transmission system; semicustom circuit techniques; semicustom design methods;
Journal_Title :
Computers and Digital Techniques, IEE Proceedings E
DOI :
10.1049/ip-e:19850010
