• DocumentCode
    932278
  • Title

    Continuous-time filter design optimized for reduced die area

  • Author

    Myers, Charles ; Greenley, Brandon ; Thomas, Daniel ; Moon, Un-Ku

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA
  • Volume
    51
  • Issue
    3
  • fYear
    2004
  • fDate
    3/1/2004 12:00:00 AM
  • Firstpage
    105
  • Lastpage
    110
  • Abstract
    A method for distributing capacitor and resistor area to optimally reduce die area in a given continuous-time filter design while maintaining the filter´s designed signal-to-noise ratio (SNR), frequency response, and topology is discussed. To do this, a basic linear programming algorithm is developed from derived circuit cost and constraint functions. Among the three major filter types of fifth-order under comparison, maximum combined capacitor and resistor die area savings of 21% results for the Butterworth filter. An alternative approach where the SNR is optimized for a given die area is also presented. Maximum improvement of the fifth-order Butterworth filter for this approach is 1.2 dB.
  • Keywords
    Butterworth filters; analogue circuits; capacitors; circuit optimisation; continuous time filters; frequency response; linear programming; network topology; resistors; Butterworth filter; SNR maximization; capacitor area; circuit constraint functions; circuit cost functions; continous-time filter; continuous-time filter design; die area minimization; frequency response; linear programming; reduced die area; resistor area; signal-to-noise ratio; Capacitors; Circuit topology; Cost function; Design optimization; Filters; Frequency response; Linear programming; Resistors; Signal design; Signal to noise ratio;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Express Briefs, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-7747
  • Type

    jour

  • DOI
    10.1109/TCSII.2003.822425
  • Filename
    1275617