Title :
Real impact of dynamic operation stress during burn-in on DRAM retention time
Author :
Kim, Il-Gweon ; Choi, Se-Kyeong ; Choi, Jin-Hyeok ; Park, Joo-Seog
Author_Institution :
Inst. of Ind. Sci., Univ. of Tokyo, Japan
fDate :
4/1/2004 12:00:00 AM
Abstract :
The burn-in (BI) mechanism in connection with the dynamic operation stress (DOS) has been investigated to examine the real impact on dynamic random access memory (DRAM) reliablity. In this paper, the wafer burn-in (WBI) method with equivalent screening efficiency as the package burn-in (PBI) is implemented by employing DOS. It is found that retention time degradation by BI stress in DRAM with potentially lethal defects is mainly attributed to DOS-induced hot carrier (HC) degradation of DRAM cell. Hot electrons injection in Si-SiO2 interface brings about lots of interfacial states as well as the electrical field modification at the gate-overlapped region, causing the degradation of retention time. This is clarified by an anomalous threshold voltage (VT) shift, and an increase of gate-induced drain leakage (GIDL) after dc HC stress having the identical stress voltage as DOS. Moreover, it is proved that a WBI procedure with the relevant DOS can screen out weak bits effectively, compared to that with only static stress.
Keywords :
DRAM chips; charge injection; hot carriers; interface states; DOS-induced hot carrier degradation; DRAM cell; DRAM reliability; DRAM retention time; Si-SiO2; anomalous threshold voltage; dc HC stress; dynamic operation stress; dynamic random access memory; electrical field modification; gate-induced drain leakage; gate-overlapped region; hot electrons injection; interfacial states; package burn-in; retention time degradation; static stress; stress voltage; wafer burn-in method; weak bits; Acceleration; Bismuth; DRAM chips; Degradation; Hot carriers; Packaging; Random access memory; Stress; Testing; Threshold voltage;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2004.825114