Automated synthesis of digital circuits from RT-level description

In the paper a CAD system, Orion, for the automated control-flow based synthesis of synchronous digital circuits will be presented. Orion´s goal is to speed up the design process by at least one order of magnitude, relieving the designer from uncreative and error-prone phases. Orion´s input is a behavioral description of the circuit, written in a nonprocedural hardware description language (HDL), whereas its output is a structural description, compatible with tools for automatic layout, e.g. those available for PLAs and standard cells. After a detailed analysis of Orion architecture, comparisons will be made with related researches.