• DocumentCode
    933463
  • Title

    Fault localisation when testing complex circuits

  • Author

    Velazco, R.

  • Author_Institution
    Centre National de la Recherche Scientifique, IMAG, Laboratoire Circuits et Systÿmes, Saint Martin d´´Hÿres, France
  • Volume
    132
  • Issue
    5
  • fYear
    1985
  • fDate
    10/1/1985 12:00:00 AM
  • Firstpage
    241
  • Lastpage
    245
  • Abstract
    An approach to state functional diagnoses when testing complex integrated circuits is presented. Such an approach can lead in some cases to low-level fault localisation. Experiments using the capabilities of a realised test system (GAPT test program generator, specific tester), illustrating the efficiency of this approach, are presented.
  • Keywords
    automatic testing; circuit CAD; fault location; integrated circuit testing; ATE; GAPT test program generator; IC design; automatic testing; complex integrated circuits; computer-aided techniques; low-level fault localisation; state functional diagnoses;
  • fLanguage
    English
  • Journal_Title
    Electronic Circuits and Systems, IEE Proceedings G
  • Publisher
    iet
  • ISSN
    0143-7089
  • Type

    jour

  • DOI
    10.1049/ip-g-1:19850049
  • Filename
    4646596
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=933463