Title :
Fault localisation when testing complex circuits
Author_Institution :
Centre National de la Recherche Scientifique, IMAG, Laboratoire Circuits et Systÿmes, Saint Martin d´´Hÿres, France
fDate :
10/1/1985 12:00:00 AM
Abstract :
An approach to state functional diagnoses when testing complex integrated circuits is presented. Such an approach can lead in some cases to low-level fault localisation. Experiments using the capabilities of a realised test system (GAPT test program generator, specific tester), illustrating the efficiency of this approach, are presented.
Keywords :
automatic testing; circuit CAD; fault location; integrated circuit testing; ATE; GAPT test program generator; IC design; automatic testing; complex integrated circuits; computer-aided techniques; low-level fault localisation; state functional diagnoses;
Journal_Title :
Electronic Circuits and Systems, IEE Proceedings G
DOI :
10.1049/ip-g-1:19850049
