• DocumentCode
    933712
  • Title

    The Design of High-Performance Dynamic Asynchronous Pipelines: Lookahead Style

  • Author

    Singh, Montek ; Nowick, Steven M.

  • Author_Institution
    North Carolina Univ., Chapel Hill
  • Volume
    15
  • Issue
    11
  • fYear
    2007
  • Firstpage
    1256
  • Lastpage
    1269
  • Abstract
    A new class of asynchronous pipelines is proposed, called lookahead pipelines (LP), which use dynamic logic and are capable of delivering multi-gigahertz throughputs. Since they are asynchronous, these pipelines avoid problems related to high-speed clock distribution, such as clock power, management of clock skew, and inflexibility in handling varied environments. The designs are based on the well-known PSO style of Williams and Horowitz as a starting point, but achieve significant improvements through novel protocol optimizations: the pipeline communication is structured so that critical events can be detected and exploited earlier. A special focus of this work is to target extremely fine-grain or gate-level pipelines, where the datapath is sectioned into stages, each consisting of logic that is only a single level deep. Both dual-rail and single-rail pipeline implementations are proposed. All the implementations are characterized by low-cost control structures and the avoidance of explicit latches. Post-layout SPICE simulations, in 0.18-mum technology, indicate that the best dual-rail LP design has more than twice the throughput (1.04 giga data items/s) of Williams´ PSO design, while the best single-rail LP design achieves even higher throughput (1.55 giga data items/s).
  • Keywords
    logic design; pipeline processing; SPICE simulations; dynamic logic; high-performance dynamic asynchronous pipelines; lookahead pipelines; multi-gigahertz throughputs; protocol optimizations; Clocks; Design optimization; Energy management; Environmental management; Event detection; Logic; Pipelines; Protocols; SPICE; Throughput; Asynchronous; dynamic logic; elastic pipelining; gate-level pipelines; latch controllers; micropipelines; pipeline processing; precharge logic;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2007.902205
  • Filename
    4351982