DocumentCode :
934034
Title :
Systolic implementations for deconvolution, DFT and FFT
Author :
Willey, T. ; Chapman, R. ; Yoho, H. ; Durrani, T.S. ; Preis, D.
Author_Institution :
Hewlett-Packard Limited, Research & Development Department, South Queensferry, UK
Volume :
132
Issue :
6
fYear :
1985
fDate :
10/1/1985 12:00:00 AM
Firstpage :
466
Lastpage :
472
Abstract :
The paper presents a number of systolic configurations for computing deconvolutions and discrete Fourier transformations. Two approaches to deconvolution are considered: a time-domain approach, which is based on a systolic inversion of an associated Toeplitz matrix, generated by a wavefront propagation of the known system response, while the other approach, which is in the frequency domain, utilises systolic discrete Fourier transform (DFT) and fast Fourier transform (FFT) processors. The latter employs a systolic elevator concept, which circumvents the traditional need for global communications in the FFT. Aspects of hardware implementation and speed trade-offs are also discussed.
Keywords :
computerised signal processing; fast Fourier transforms; parallel processing; DFT; FFT; Toeplitz matrix; VLSI; array processors; deconvolutions; discrete Fourier transformations; fast Fourier transform; frequency domain; system response; systolic inversion; systolic processors; time domain; wavefront propagation;
fLanguage :
English
Journal_Title :
Communications, Radar and Signal Processing, IEE Proceedings F
Publisher :
iet
ISSN :
0143-7070
Type :
jour
DOI :
10.1049/ip-f-1.1985.0087
Filename :
4646654
Link To Document :
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