A 60 μW High Linearity CMOS Peak-Stretcher/Discriminator

Author

Caccia, S. ; Bertuccio, G.

Author_Institution

Politecnico di Milano, Milan

Volume

54

Issue

3

fYear

2007

fDate

6/1/2007 12:00:00 AM

Firstpage

538

Lastpage

540

Abstract

We present a pulse peak-stretcher/discriminator designed for applications where the constraints on power consumption and linearity are stringent. The circuit, realized in 0.35 mum CMOS technology, has almost two decades input signal range with a linearity error within - 0.08/ + 0.04%, measured at 33.6 mus peaking time. The circuit is supplied with a single voltage of 3.3 V with a total power consumption of 60 muW with a layout area of 125 mum x 65 mum.

Keywords

CMOS integrated circuits; discriminators; nuclear electronics; peak detectors; power consumption; semiconductor counters; analog front-end electronics; high linearity CMOS peak-stretcher-discriminator; linearity error; mixed analog-digital integrated circuits; multichannel radiation detectors; peak detectors; power 60 muW; power consumption; semiconductor radiation detectors; time 33.6 mus; CMOS technology; Circuit topology; Detectors; Dynamic range; Energy consumption; Integrated circuit noise; Linearity; Semiconductor device noise; Spectroscopy; Switches; Front end electronics; mixed analog-digital integrated circuits; peak detectors;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/TNS.2007.895503

Filename

4237390