Title :
Built-in self-testing of VLSI circuits-getting errors to catch themselves
Author_Institution :
Dept. of Electr. Eng., Ottawa Univ., Ont., Canada
Abstract :
Built in-self-testing (BIST), a technique that generates test patterns and evaluates output responses inside the chip, is discussed. The generation of test patterns, which can be either exhaustive or random, is examined. Methods for output response evaluation are described. Implementation schemes and test evaluation are addressed.<>
Keywords :
VLSI; automatic testing; BIST; VLSI; VLSI circuits; built in self testing; exhaustive test patterns; output responses; random test patterns; test evaluation; test patterns generation; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Fabrication; Hardware; Linear feedback shift registers; Manufacturing processes; Test pattern generators; Very large scale integration;
Journal_Title :
Potentials, IEEE
