DocumentCode :
935025
Title :
SCAPE: a single-chip array processing element for signal and image processing
Author :
Lea, Robert Mike
Author_Institution :
Brunel University, Department of Electrical Engineering and Electronics, Uxbridge, UK
Volume :
133
Issue :
3
fYear :
1986
fDate :
5/1/1986 12:00:00 AM
Firstpage :
145
Lastpage :
151
Abstract :
The SCAPE chip is a practical implementation of a VLSI associative string processor; integrating a string of 256 identical processing elements, each comprising 37 bits of content-addressable memory, a 1-bit adder and logic for communication with other processing elements. Packing 143K transistors on a 73 mm2 silicon die, with 2.5 ¿¿m p-well (two-layer metal) CMOS design rules, the SCAPE chip is packaged in a 68-pin chip carrier and, operating at 10 MHz, dissipates less than 900 mW. The paper describes the SCAPE chip architecture and floor plan in structural detail. Testability considerations, design verification and SCAPE software are discussed, and the results from recent performance simulation studies are also reported. The SCAPE chip is scheduled for fabrication, by Plessey (Caswell), in the second quarter of 1986.
Keywords :
CMOS integrated circuits; VLSI; computerised pattern recognition; computerised picture processing; computerised signal processing; microprocessor chips; 10 MHz; 68-pin chip carrier; 900 mW; CMOS design rules; SCAPE chip; SCAPE software; VLSI associative string processor; communication; content-addressable memory; design verification; image processing; performance simulation studies; processing elements; signal processing; single-chip array processing element; structural detail; testability considerations;
fLanguage :
English
Journal_Title :
Computers and Digital Techniques, IEE Proceedings E
Publisher :
iet
ISSN :
0143-7062
Type :
jour
DOI :
10.1049/ip-e.1986.0019
Filename :
4646767
Link To Document :
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