Title :
SIMD matrix methods for detecting hazards in logic circuits
Author :
Heal, B.W. ; Page, R.M.R.
Author_Institution :
Dept. of Inf. Sci., Portsmouth Univ., UK
fDate :
7/1/1993 12:00:00 AM
Abstract :
The paper describes the underlying theory and an outline for an algorithm which is designed to utilise the power of SIMD computers to detect and locate the presence of logic hazards in combinational logic circuits.
Keywords :
combinatorial circuits; fault location; logic testing; matrix algebra; parallel processing; SIMD matrix methods; combinational logic circuits; hazards detection;
Journal_Title :
Computers and Digital Techniques, IEE Proceedings E
