• DocumentCode
    937174
  • Title

    A dual-gate-controlled single-electron transistor using self-aligned polysilicon sidewall spacer gates on silicon-on-insulator nanowire

  • Author

    Hu, Shu-Fen ; Wu, Yung-Chun ; Sung, Chin-Lung ; Chang, Chun-Yen ; Huang, Tiao-Yuan

  • Author_Institution
    Nat. Nano Device Labs., Hsinchu, Taiwan
  • Volume
    3
  • Issue
    1
  • fYear
    2004
  • fDate
    3/1/2004 12:00:00 AM
  • Firstpage
    93
  • Lastpage
    97
  • Abstract
    A dual-gate-controlled single-electron transistor was fabricated by using self-aligned polysilicon sidewall spacer gates on a silicon-on-insulator nanowire. The quantum dot formed by the electric field effect of the dual-gate structure was miniaturized to smaller than the state-of-the-art feature size, through a combination of electron beam lithography, oxidation, and polysilicon sidewall spacer gate formation processes. The device shows typical MOSFET I-V characteristics at room temperature. However, the Coulomb gap and Coulomb oscillations are clearly observed at 4 K.
  • Keywords
    MOSFET; electric field effects; electron beam lithography; elemental semiconductors; nanowires; oxidation; semiconductor quantum dots; silicon; silicon-on-insulator; single electron transistors; 293 to 298 K; 4 K; Coulomb gap; Coulomb oscillations; MOSFET; Si; electric field effect; electron beam lithography; gate formation processes; oxidation; self-aligned polysilicon; semiconductor quantum dot; silicon-on-insulator nanowire; single-electron transistor; Electron beams; Laboratories; Lithography; Oxidation; Quantum dots; Silicon on insulator technology; Single electron transistors; Temperature; Wires; Writing;
  • fLanguage
    English
  • Journal_Title
    Nanotechnology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1536-125X
  • Type

    jour

  • DOI
    10.1109/TNANO.2003.820784
  • Filename
    1278275