Analog logic techniques steer around the noise

CMOS folded source-coupled logic (FSCL) and current-steering logic (CSL), developed to complement conventional CMOS static logic in high-precision mixed-signal applications, are examined. The key feature of FSCL and CSL is the reduction in power-supply noise-current spikes by two orders of magnitude or more compared to conventional CMOS logic. Hence, FSCL and CSL are attractive for the high-speed logic sections of CMOS mixed-mode integrated circuits, while conventional logic is appropriate for the low-speed digital subsections.<>