A simplified computational kernel for trellis-based decoding

Author

Kamuf, Matthias ; Anderson, John B. ; Öwall, Viktor

Author_Institution

Dept. of Electroscience, Lund Univ., Sweden

Volume

8

Issue

3

fYear

2004

fDate

3/1/2004 12:00:00 AM

Firstpage

156

Lastpage

158

Abstract

A simplified branch metric and add-compare-select (ACS) unit is presented for use in trellis-based decoding architectures. The simplification is based on a complementary property of best feedforward and some systematic feedback encoders. As a result, one adder is saved in every other ACS unit. Furthermore, only half the branch metrics have to be calculated. It is shown that this simplification becomes especially beneficial for rate 1/2 convolutional codes. Consequently, area and power consumption will be reduced in a hardware implementation.

Keywords

VLSI; Viterbi decoding; adders; convolutional codes; feedforward; maximum likelihood decoding; trellis codes; VLSI; Viterbi decoding; add-compare-select unit; adder; area reduction; branch metric unit; feedforward complementary property; hardware implementation; logMAP algorithm; power consumption reduction; rate 1/2 convolutional code; simplified computational kernel; systematic feedback encoder; trellis-based decoding architecture; very large-scale integration; Computer architecture; Convolutional codes; Decoding; Energy consumption; Feedback; Hardware; Kernel; Large scale integration; Noise measurement; Viterbi algorithm;

fLanguage

English

Journal_Title

Communications Letters, IEEE

Publisher

ieee

ISSN

1089-7798

Type

jour

DOI

10.1109/LCOMM.2004.825743

Filename

1278306