Title :
Cost reduction of Monte Carlo yield estimates
Author :
Jones, I.W. ; Spence, R.
Author_Institution :
Imperial College of Science and Technology, Department of Electrical Engineering, London, UK
fDate :
12/1/1987 12:00:00 AM
Abstract :
Three methods for reducing the cost of Monte Carlo yield estimates are presented and evaluated. The first method makes use of the positions of the passing and failing points to enhance the yield estimate obtained from the crude Monte Carlo yield analysis. The second and third methods make use of lst-order performance sensitivity values to estimate the performance of samples without carrying out further circuit analyses. Evaluation of the methods was carried out on three theoretical problems and also on a Sallen and Key filter circuit. Results presented indicate that savings of up to 80% of the circuit simulation costs can be achieved. The experimental results suggest that still further improvements could be made to the yield estimation methods, and a proposal for such an improvement is presented.
Keywords :
Monte Carlo methods; circuit analysis computing; economics; integrated circuit manufacture; statistical analysis; 1st-order performance sensitivity values; IC manufacture; Monte Carlo yield estimates; Sallen/Key filter; circuit simulation costs; cost reduction; passing/failing points positions; statistical methods;
Journal_Title :
Electronic Circuits and Systems, IEE Proceedings G
DOI :
10.1049/ip-g-1:19870039