DocumentCode
938881
Title
Design technique for dynamically evolving N-tuple nets
Author
Binstead, M.J. ; Jones, J.Antonia
Author_Institution
Imperial College of Science and Technology, Department of Computing, London, UK
Volume
134
Issue
6
fYear
1987
fDate
11/1/1987 12:00:00 AM
Firstpage
265
Lastpage
269
Abstract
N-tuple nets are conceptually a highly parallel architecture. However, high-speed serial emulations of N-tuple nets offer considerable advantages of flexibility and cost efficiency in applications requiring only moderate bandwidth. In the paper a software technique for designing dynamically evolved N-tuple nets is described and the process whereby the designed structure can be progressively mapped into hardware to a level determined by the application requirements is illustrated.
Keywords
parallel architectures; pattern recognition; design technique; dynamically evolving N-tuple nets; highly parallel architecture; serial emulations; software technique;
fLanguage
English
Journal_Title
Computers and Digital Techniques, IEE Proceedings E
Publisher
iet
ISSN
0143-7062
Type
jour
DOI
10.1049/ip-e.1987.0045
Filename
4647180
Link To Document