DocumentCode
940162
Title
930-V 170-mΩ·cm2 lateral two-zone RESURF MOSFETs in 4H-SiC with NO annealing
Author
Wang, W. ; Banerjee, S. ; Chow, T.P. ; Gutmann, R.J.
Author_Institution
Center for Integrated Electron. & Electron. Manuf., Rensselaer Polytech. Inst., Troy, NY, USA
Volume
25
Issue
4
fYear
2004
fDate
4/1/2004 12:00:00 AM
Firstpage
185
Lastpage
187
Abstract
The first lateral two-zone reduced surface field MOSFETs in 4H-SiC with NO annealing are reported. Interface properties of 4H-SiC-SiO2 are improved, with inversion layer field-effect mobility increased to 25 cm2/V·s, five times higher than that of dry reoxidation process, and with channel resistance significantly reduced. Devices are normally off with low leakage current. Threshold voltage is around 3 V. Blocking voltage of 930 V and specific on-resistance of 170 mΩ·cm2 were obtained. Large-area devices with multifinger geometry are also demonstrated with scaled-up current. The output characteristics exhibit excellent linear and saturation regions.
Keywords
annealing; carrier mobility; inversion layers; leakage currents; power MOSFET; silicon compounds; wide band gap semiconductors; 3 V; 4H-SiC; 930 V; NO; NO annealing; SiC; blocking voltage; channel resistance; dry reoxidation; interface properties; inversion layer field-effect mobility; large-area devices; lateral two-zone RESURF MOSFET; leakage current; linear region; multifinger geometry; on-resistance; output characteristics; reduced surface field MOSFET; saturation region; scaled-up current; threshold voltage; Annealing; Breakdown voltage; Fabrication; Leakage current; MOSFETs; Nitrogen; Plasma temperature; Silicon carbide; Surface resistance; Threshold voltage;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2004.825196
Filename
1278550
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