DocumentCode
9415
Title
Broadside and Skewed-Load Tests Under Primary Input Constraints
Author
Pomeranz, Irith
Author_Institution
School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA
Volume
21
Issue
4
fYear
2013
fDate
Apr-13
Firstpage
776
Lastpage
780
Abstract
Tester limitations may impose certain constraints on the primary input vectors applicable as part of a two-pattern test for delay faults. Under these constraints, the primary input vectors may be held constant, or the second primary input vector of a test may be obtained by a single shift of a scan chain relative to the first. The goal of this brief is to study the differences in achievable transition fault coverage between various primary input constraints that are similar to the commonly used ones of holding or shifting primary input vectors. This brief also studies the possibility of combining the constraints in order to increase the transition fault coverage. The combination requires a fixed and circuit-independent hardware structure similar to the case where shifting of primary input vectors is used. This study is done using test sets that consist of both broadside and skewed-load tests in order to maximize the transition fault coverage.
Keywords
Circuit faults; Delay; Hardware; Nickel; System-on-a-chip; Vectors; Very large scale integration; Broadside tests; full-scan circuits; skewed-load tests; test generation; transition faults;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2012.2192300
Filename
6186839
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