Superconductor-semiconductor memories

Author

Ghoshal, U. ; Kroger, H. ; Van Duzer, Theodore

Author_Institution

California Univ., Berkeley, CA, USA

Volume

3

Issue

1

fYear

1993

fDate

3/1/1993 12:00:00 AM

Firstpage

2315

Lastpage

2318

Abstract

The authors describe new types of hybrid superconductor-semiconductor RAMs which utilize the current switches in superconductive electronics to remove important constraints on the design of semiconductor memories and achieve performances attainable by the individual technologies separately. They focus on a voltage word line RAM architecture and illustrate the basic designs in terms of a low-T/sub c/ Josephson-CMOS technology. They discuss the design of interface circuits, word-line drivers, memory cells, and fluxoelectronic current sensing of bit lines. Current projections for 4 K operation indicate that sub-nanosecond 64-kb RAMs using a 0.8- mu m CMOS technology are possible. Extensions of this design to high-T/sub c/ superconductor-CMOS circuits operating at 77 K are briefly discussed.<>

Keywords

CMOS integrated circuits; random-access storage; superconducting memory circuits; 4 K; Josephson-CMOS technology; bit lines; design; fluxoelectronic current sensing; hybrid superconductor-semiconductor RAMs; interface circuits; memory cells; superconductor-CMOS circuits; voltage word line RAM architecture; word-line drivers; CMOS technology; Circuits; Laboratories; Random access memory; Read-write memory; Semiconductor memory; Semiconductor optical amplifiers; Superconducting transmission lines; Superconductivity; Temperature;

fLanguage

English

Journal_Title

Applied Superconductivity, IEEE Transactions on

Publisher

ieee

ISSN

1051-8223

Type

jour

DOI

10.1109/77.233542

Filename

233542