Title :
Adaptively designed test logic for digital circuits
Author :
Aleksander, I. ; Al-Bandar, Z.
Author_Institution :
Brunel University, Department of Electrical Engineering & Electronics, Uxbridge, UK
Abstract :
Adaptive n-tuple pattern-recognition techniques in their hardware embodiment may be used to design test circuits for logic systems which indicate the presence of a fault. The principles of this concept are explained and early results obtained with realistically scaled circuits are presented.
Keywords :
digital circuits; logic testing; pattern recognition; adaptive n-tuple pattern recognition techniques; digital circuits; test logic;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19770336
