Channel vocoder based on c.c.d. discrete-Fourier-transform processors

This paper investigates how charge-coupled-device (c.c.d) modules could be applied in an alternative implementation of the now established channel vocoder. The objective is to demonstrate the potential of c.c.d. technology in the realisation of low-cost low-power speech processors. In this proposed implementation, the central processor is based on a c.c.d. discrete Fourier transform (d.f.t.) algorithm which is multiplexed to provide spectral data for channel compression and cepstral data for pitch detection. Synthetic speech is reconstructed from zero phase impulse responses by a novel convolution technique designed to eliminate frame discontinuities. Extensive computer simulations have been used to determine a suitable hardware architecture and this is compared to a c.c.d. switched-capacitor parallel-filter-bank channel vocoder in terms of performance and total chip count. It is concluded that a very small c.c.d. channel vocoder configuration could be based on a combination of the d.f.t. analyser and the filter-bank synthesiser.