DocumentCode
946198
Title
Gate controlled bulk-barrier mechanism in an MOS power transistor
Author
McCowen, A. ; Board, K.
Volume
134
Issue
6
fYear
1987
fDate
12/1/1987 12:00:00 AM
Firstpage
168
Lastpage
170
Abstract
A double-gate thin base MOS structure with a lightly doped drain is characterised and shown to have potential for low on-resistance designs. The drain current is controlled by a novel gate-controlled barrier mechanism in the base, such that beyond threshold the whole base becomes strongly inverted. This `bulk¿ inversion gives rise to a `wide¿ channel which will have a much lower resistance than the corresponding conventional surface inversion layer. A simple pseudo-one-dimensional analysis of the I/V characteristics is developed and is validated by a full two-dimensional solution of the semiconductor transport equations.
Keywords
insulated gate field effect transistors; power transistors; I/V characteristics; LDD device; MOS power transistor; bulk inversion; bulk-barrier; drain current; gate-controlled barrier mechanism; lightly doped drain; low on-resistance designs; semiconductor transport equations; two-dimensional solution;
fLanguage
English
Journal_Title
Solid-State and Electron Devices, IEE Proceedings I
Publisher
iet
ISSN
0143-7100
Type
jour
DOI
10.1049/ip-i-1.1987.0034
Filename
4648196
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