Fully parallel superconducting analog-to-digital converter

Author

Luong, H. ; Hebert, D. ; Van Duzer, Theodore

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA

Volume

3

Issue

1

fYear

1993

fDate

3/1/1993 12:00:00 AM

Firstpage

2633

Lastpage

2636

Abstract

The authors present measurements that follow up on a design of a 3-b wideband analog-to-digital converter (ADC) given by E. Fang et al. (IEEE Trans. Magn., vol.27, no.3, p.2891-4, 1991). The original design has been modified, and some circuit parameters have been changed to optimize the margins. Based on this modified design, the authors have fabricated and were able to demonstrate the functionality not only of simple logic gates, including inverters, AND, OR, NAND, NOR, and XOR, but also of much more complicated combinations, including a complete 2-b ADC and a complete 3-b binary encoder. After a brief description of the design and modifications, low-speed tests of these circuits are presented and discussed. Simulations have shown that the complete 3-b ADC can work up to 5 GHz.<>

Keywords

Josephson effect; SQUIDs; analogue-digital conversion; encoding; parallel processing; superconducting integrated circuits; 5 GHz; AND; NAND; NOR; OR; XOR; analog-to-digital converter; binary encoder; fully parallel ADC; inverters; logic gates; low-speed tests; superconducting A/D convertor; there bit convertor; Analog-digital conversion; Bandwidth; Circuit testing; Clocks; Design optimization; Electric variables measurement; Inverters; Logic gates; SQUIDs; Wideband;

fLanguage

English

Journal_Title

Applied Superconductivity, IEEE Transactions on

Publisher

ieee

ISSN

1051-8223

Type

jour

DOI

10.1109/77.233968

Filename

233968