DocumentCode :
948795
Title :
The Image chip for high performance 3D rendering
Author :
Dunnett, Graham J. ; White, Martin ; Lister, Paul F. ; Grimsdale, Richard L. ; Gelmot, F.
Author_Institution :
Sussex Univ., Brighton, UK
Volume :
12
Issue :
6
fYear :
1992
Firstpage :
41
Lastpage :
52
Abstract :
The Image chip, which accelerates 3D rendering algorithms base on Bresenham´s line drawing and Pineda´s parallel polygon drawing algorithms, is discussed. With these algorithms, Image can directly draw lines, spans, and triangles in wireframe, hidden-line, and Gouraud-shading modes. Image also directly antialiases vectors or provides antialiasing information to enhance antialiasing of vectors or triangles. Image´s operation, separation into layers to maximize performance and simplify the input and output interfaces, and support of advanced rendering effects such as Phong shading and texture mapping are described. The designs of Image´s internal architecture, host interface, and memory interface are also described.<>
Keywords :
computer graphic equipment; digital signal processing chips; rendering (computer graphics); Bresenham line drawing; Gouraud-shading modes; Image chip; Phong shading; Pineda algorithm; antialiasing; hidden-line; high performance 3D rendering; host interface; internal architecture; memory interface; parallel polygon drawing; texture mapping; wireframe; Clocks; Computer architecture; Geometry; Graphics; Image converters; Pipelines; Pixel; Rendering (computer graphics); Solid modeling; Very large scale integration;
fLanguage :
English
Journal_Title :
Computer Graphics and Applications, IEEE
Publisher :
ieee
ISSN :
0272-1716
Type :
jour
DOI :
10.1109/38.163624
Filename :
163624
Link To Document :
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