• DocumentCode
    948976
  • Title

    Study of FSG/SiO2 double interlayer conditions to prevent Al wiring delamination for sub-0.18-μm device integration

  • Author

    Kawashima, Yoshiya ; Ichikawa, Toshihiko ; Nakamura, Norio ; Obata, Syu ; Den, Yasuhide ; Kawano, Hideo ; Ide, Takashi ; Kudo, Masahiro

  • Author_Institution
    Adv. Technol. Dev. Div., NEC Electron. Corp., Sagamihara, Japan
  • Volume
    15
  • Issue
    4
  • fYear
    2002
  • fDate
    11/1/2002 12:00:00 AM
  • Firstpage
    497
  • Lastpage
    505
  • Abstract
    A double interlayer of high-density plasma fluorinated silica glass (FSG) and SiO2 has been developed to control fluorine instability for sub-0.18-μm devices. However, the interlayer conditions need further study for robust integration. The authors investigate the optimum conditions to prevent Al wiring delamination. The correlation between the incidence of delamination and F concentration at Ti-SiO2 was demonstrated by the three-dimensional mapping of interfacial F concentrations with various thicknesses of SiO2 and F contents in FSG. Detailed analysis of the Ti-SiO2 interface reveals that the anomalous growth of the interface layer by absorbing F atoms into the Ti layer causes delamination. The properties of SiO2, such as the compressive stress and the density of oxygen deficiency, were adjusted to reduce F diffusion. In addition, the thickness was controlled to above 4500 Å to suppress F accumulation at Ti-SiO2 to within the permissible level. These conditions resulted in preventing delamination and obtaining integration reliability without increasing the capacitance between adjacent metal lines.
  • Keywords
    adhesion; aluminium; delamination; dielectric thin films; fluorine; integrated circuit metallisation; integrated circuit reliability; internal stresses; permittivity; silicon compounds; titanium; titanium compounds; 0.18 micron; Al-TiN-Ti-SiO2-SiO2:F; anomalous growth; compressive stress; double interlayer conditions; fluorine instability; high-density plasma; integration reliability; intermetal dielectric; metal delamination; three-dimensional mapping; wiring delamination; Atomic layer deposition; Capacitance; Compressive stress; Delamination; Glass; Plasma devices; Robustness; Silicon compounds; Thickness control; Wiring;
  • fLanguage
    English
  • Journal_Title
    Semiconductor Manufacturing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0894-6507
  • Type

    jour

  • DOI
    10.1109/TSM.2002.804908
  • Filename
    1134167