Bonded wafer substrates for integrated detector arrays

Bonded wafer substrates that are optimized for integrating high-energy-particle silicon detector arrays with their readout electronics have been fabricated. The detectors are processed in the handle wafer, which is a 300-μm-thick, high-resistivity, <111> silicon wafer. This wafer is bonded to a primary wafer using a low-temperature process that does not affect the detector material. The support electronics are processed in the remnant of the primary wafer, which is a submicron-thick <100> silicon film formed by a bond-and-etchback procedure. These two materials are isolated from each other by a radiation-hardened dielectric film. The integration process is based on a low-temperature, radiation-hardened VLSI CMOS process that is also shown not to seriously affect the detector material