Non-real-time realization of any finite-state sequential machine using a single shift-register

A model for simulating any finite-state sequential machine is presented as an alternative to the single shift-register model in [1]. The proposed model not only uses a single shift-register but also has the advantage of allowing a machine to be synthesized whose speed is improved by a factor of 2 and whose cost is reduced by nearly a factor of 2 over machines produced by the synthesis procedure associated with the former model.