DocumentCode
950926
Title
Problems Associated with Quality control Sampling in Modern IC Manufacturing
Author
Pesotchinsky, Leon
Author_Institution
San Jose State University and Vitaphore Consulting Group,CA
Volume
10
Issue
1
fYear
1987
fDate
3/1/1987 12:00:00 AM
Firstpage
107
Lastpage
110
Abstract
Existing sampling plans are not very efficient in situations when a fraction of defective items is on the order of 0.0001. They usually command a 100-percent inspection, but it still does not provide for 100percent quality since in semiconductor manufacturing the inspection is never totally reliable and can easily introduce an error of almost the same order as the fraction of defectives. Skip-lot strategies can rarely be used because most of the customers frequently require inspection of every shipped lot. An inspection policy is suggested which combines the ideas of various sampling strategies and provides a guarantee against undesirable levels of average outgoing quality as well as protection against poor quality on a lot-to-lot basis. The method is based on observing the number of good items between defective ones and shifting to a 100percent inspection when certain conditions are not met.
Keywords
Integrated circuit fabrication; Manufacturing; Quality control; Sampling methods; Circuit testing; Inspection; Integrated circuit manufacture; Integrated circuit testing; Manufacturing processes; Protection; Quality control; Sampling methods; Semiconductor device manufacture; Semiconductor device reliability;
fLanguage
English
Journal_Title
Components, Hybrids, and Manufacturing Technology, IEEE Transactions on
Publisher
ieee
ISSN
0148-6411
Type
jour
DOI
10.1109/TCHMT.1987.1134700
Filename
1134700
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