DocumentCode :
951298
Title :
Comparison of Wafer Scale Integration with VLSI Packaging Approaches
Author :
Neugebauer, Constantine A. ; Carlson, Richard O.
Author_Institution :
General Electric Company,Schenectady,NY
Volume :
10
Issue :
2
fYear :
1987
fDate :
6/1/1987 12:00:00 AM
Firstpage :
184
Lastpage :
189
Abstract :
A comparison is made of various high-density packaging approaches, including printed wiring board, thick-film hybrids, and wafer scale integration (WSI). Criteria include power dissipation, density, delays, and cost. It is concluded that thin-film hybrids using state-of-the-art VLSI chips have the potential for WSI density and performance. The requirement for fault tolerance, additional levels of metallization, excess power dissipation, process conservatism to achieve finite yield, and the nonoptimum nature of the Al/Si02transmission line for cross wafer communication have made WSI noncompetitive.
Keywords :
Printed circuits; Thick-film circuit packaging; Thin-film circuit packaging; WSI; Wafer-scale integration (WSI); Costs; Delay; Fault tolerance; Metallization; Packaging; Power dissipation; Transistors; Very large scale integration; Wafer scale integration; Wiring;
fLanguage :
English
Journal_Title :
Components, Hybrids, and Manufacturing Technology, IEEE Transactions on
Publisher :
ieee
ISSN :
0148-6411
Type :
jour
DOI :
10.1109/TCHMT.1987.1134736
Filename :
1134736
Link To Document :
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