• DocumentCode
    953065
  • Title

    The design and analysis of a Miller-divider-based clock generator for MBOA-UWB application

  • Author

    Lee, Tai-Cheng ; Huang, Yen-Chuan

  • Author_Institution
    Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
  • Volume
    41
  • Issue
    6
  • fYear
    2006
  • fDate
    6/1/2006 12:00:00 AM
  • Firstpage
    1253
  • Lastpage
    1261
  • Abstract
    A Miller-divider-based clock generator is proposed for Multi-Band OFDM Alliance (MBOA) ultrawideband (UWB) application. Employing closed-loop operation, the clock generator can produce three different carrier frequencies with negligible in-band spurs. The settling time of the proposed clock generator is analyzed based on a linear feedback system. A transistor sizing optimization technique for active inductors with a current-reusing technique is used to achieve low-power operation and area saving. Fabricated in a 0.18-μm technology, the clock generator achieves less than 9.5-ns settling time while dissipating less than 47 mW from a 1.8-V power supply.
  • Keywords
    OFDM modulation; frequency dividers; frequency synthesizers; ultra wideband communication; 1.8 V; 47 mW; 9.5 ns; MBOA-UWB application; Miller divider; clock generator; current-reusing technique; frequency synthesizer; linear feedback system; multi-band OFDM alliance; transistor sizing optimization; ultrawideband application; Amplitude modulation; Band pass filters; Bandwidth; CMOS technology; Clocks; Frequency conversion; Frequency synthesizers; Power generation; Signal generators; Ultra wideband technology; Frequency synthesizer; Miller divider; ultrawideband (UWB);
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.2006.874279
  • Filename
    1637590