DocumentCode :
953251
Title :
An adaptive checker for the fully differential analog code
Author :
Stratigopoulos, Haralampos-G D. ; Makris, Yiorgos
Author_Institution :
Dept. of Electr. Eng., Yale Univ., New Haven, CT, USA
Volume :
41
Issue :
6
fYear :
2006
fDate :
6/1/2006 12:00:00 AM
Firstpage :
1421
Lastpage :
1429
Abstract :
This paper discusses the design of an adaptive checker for concurrent error detection in fully differential analog circuits. The checker monitors the fully differential analog code, which states that, in nominal operation, the common mode signal of any symmetric node pair remains within a narrow band around the quiescent DC bias. The checker measures the common mode voltage and reports an error whenever the measured value exceeds a threshold. Its key feature is that this comparison threshold is dynamically adjusted in order to lower the probability of false alarms. The design was fabricated in a 0.5-μm CMOS technology. The chip test results prove the feasibility of the adaptive thresholding concept.
Keywords :
analogue circuits; error detection; 0.5 micron; CMOS technology; adaptive checker; adaptive thresholding concept; analog circuit testing; common mode voltage; concurrent error detection; fully differential analog code; Analog circuits; CMOS technology; Circuit noise; Circuit testing; Clocks; Narrowband; Noise cancellation; Nonlinear filters; Semiconductor device measurement; Threshold voltage; Analog circuit testing; checkers; concurrent error detection; fully differential circuits;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2006.874272
Filename :
1637606
Link To Document :
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