Title :
Chip scale package: “a lightly dressed LSI chip”
Author :
Yasunaga, Masatoshi ; Baba, Shinji ; Matsuo, Mitsuyasu ; Matsushima, Hironori ; Nakao, Shin ; Tachikawa, Tom
Author_Institution :
IC Assembly Eng. Dept., Mitsubishi Electr. Corp., Hyogo, Japan
fDate :
9/1/1995 12:00:00 AM
Abstract :
A new flip-chip-like package named chip scale package (CSP) has been developed. It is constructed of LSI chips, thin resin coats, and electrode balls, having no leadframe nor any bonding wires. Wiring conductor patterns were used for electrical connection between internal pads on the die and external electrode balls. Also the transfer-bumping technique was applied for inner bump formation. Finally, solder joint life when mounted onto typical boards was estimated by simulation
Keywords :
flip-chip devices; integrated circuit interconnections; integrated circuit packaging; large scale integration; microassembling; soldering; LSI chips; chip scale package; electrical connection; electrode balls; flip-chip-like package; inner bump formation; solder joint life; thin resin coatings; transfer-bumping technique; wiring conductor patterns; Bonding; Chip scale packaging; Conductors; Electrodes; Large scale integration; Lead; Resins; Soldering; Wires; Wiring;
Journal_Title :
Components, Packaging, and Manufacturing Technology, Part A, IEEE Transactions on
