DocumentCode :
953513
Title :
Negative-bias temperature instability cure by process optimization
Author :
Scarpa, Andrea ; Ward, Derek ; Dubois, Jerôme ; Van Marwijk, Leo ; Gausepohl, Steven ; Campos, Richard ; Sim, Kwang Ye ; Cacciato, Antonio ; Kho, Ramun ; Bolt, Mike
Author_Institution :
ICN Philips Semicond., Nijmegen, Netherlands
Volume :
53
Issue :
6
fYear :
2006
fDate :
6/1/2006 12:00:00 AM
Firstpage :
1331
Lastpage :
1339
Abstract :
Negative-bias temperature instability (NBTI) is a major challenge for modern integrated circuits and may represent a key factor for the success of a technology. In this paper, NBTI is approached from a process point of view, providing a general picture of the manufacturing process steps that affect NBTI performance. It is found that several process steps may be optimized to reduce the NBTI susceptibility of p-type MOSFETs. The choice of the cure approach depends on the device application, on the technology, and also on the equipment.
Keywords :
MOSFET; semiconductor device reliability; thermal stability; NBTI performance; negative-bias temperature instability; p-type MOSFET; process optimization; Circuits; MOSFETs; Niobium compounds; Nitrogen; Nonvolatile memory; Plasma temperature; Silicon; Stress; Threshold voltage; Titanium compounds; Device lifetime; MOSFET; reliability;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2006.873884
Filename :
1637628
Link To Document :
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