Architectures for fault-tolerant spacecraft computers

This paper summarizes the results of a long-term research program in fault-tolerant computing for spacecraft on-board processing. In response to changing device technology this program has progressed from the design of a fault-tolerant uniprocessor to the development of fault-tolerant distributed computer systems. The unusual requirements of spacecraft computing are described along with the resulting real-time computer architectures. The following aspects of these designs are discussed: 1) architectural features to minimize complexity in the distributed computer system, 2) fault-detection and recovery, 3) techniques to enhance reliability and testability, and 4) design approaches for LSI implementation.