DocumentCode
955369
Title
Assessing GaAs high-speed-switching JFET device models: 1- versus 2-dimensional analysis
Author
Anderson, G.F. ; Current, K.W. ; Forbes, L.
Author_Institution
University of California, Davis, CA
Volume
67
Issue
3
fYear
1979
fDate
3/1/1979 12:00:00 AM
Firstpage
435
Lastpage
435
Abstract
The general results and conclusions of these researchers and others investigating 1- and 2-dimensional device models for high-speed low-power GaAs switching JFET´s are briefly reviewed and summarized. Guidelines for assessing 1- or 2-dimensional device model adequacy based upon device geometries and dopings are proposed.
Keywords
Doping; Gallium arsenide; Geometry; Guidelines; Logic circuits; Logic devices; Predictive models; Semiconductor process modeling; Silicon; Solid modeling;
fLanguage
English
Journal_Title
Proceedings of the IEEE
Publisher
ieee
ISSN
0018-9219
Type
jour
DOI
10.1109/PROC.1979.11261
Filename
1455530
Link To Document