DocumentCode :
956998
Title :
Design and Fabrication of Asymmetric MOSFETs Using a Novel Self-Aligned Structure
Author :
Kim, Jong Pil ; Choi, Woo Young ; Song, Jae Young ; Kim, Sang Wan ; Lee, Jong Duk ; Park, Byung-Gook
Author_Institution :
Seoul Nat. Univ., Seoul
Volume :
54
Issue :
11
fYear :
2007
Firstpage :
2969
Lastpage :
2974
Abstract :
A novel asymmetric MOSFET with no lightly doped drain on the source side is simulated on bulk Si using a device simulator (SILVACO). To overcome the problems of the conventional asymmetric process, a novel asymmetric MOSFET using a mesa structure and a sidewall spacer gate is proposed, and it provides a self-alignment process, aggressive scaling, and better uniformity. First of all, we have compared the simulated characteristics of the asymmetric and symmetric MOSFETs. Basically, both asymmetric and symmetric MOSFETs have an n-type channel and the same physical parameters. Compared with the symmetric MOSFET, the asymmetric MOSFET shows better device performance. Moreover, we have successfully fabricated 50-nm asymmetric NMOSFETs based on simulation results and investigated its operation and characteristics.
Keywords :
MOSFET; silicon; NMOSFET; SILVACO; Si; aggressive scaling; asymmetric MOSFET design; device simulator; mesa structure; n-type channel; self-aligned structure; self-alignment process; sidewall spacer gate; size 50 nm; Acceleration; Breakdown voltage; CMOS process; CMOS technology; Design optimization; Fabrication; Hot carriers; Impact ionization; MOSFETs; Maintenance; Asymmetric MOSFET; lightly doped drain (LDD); mesa structure; sidewall spacer gate;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2007.906969
Filename :
4367600
Link To Document :
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