DocumentCode
958224
Title
A simple yet effective technique for partitioning
Author
Shin, Hyunchul ; Kim, Chunghee
Author_Institution
Dept. of Electron. Eng., Han-Yang Univ., Seoul, South Korea
Volume
1
Issue
3
fYear
1993
Firstpage
380
Lastpage
386
Abstract
Partitioning is an important step in the top-down design of large complicated integrated circuits. In this paper, a simple yet effective partitioning technique is described. It is based on the clustering of "closely" connected cells and the gradual enforcement of size-constraints. At the beginning, clusters are formed in the bottom-up fashion to reduce the problem size. Then the clusters are partitioned using several different parameters to find a good starting point. The best result achieved during the cluster partitioning is used as the initial solution for the lower level partitioning. The gradual constraint enforcement technique is used to cope with the local minimum problems. It allows cells or clusters to move with more freedom among the subsets during earlier iterations and thus may effectively find a near optimum solution. Several experimental results show that the new partitioning technique produces favorable results. In particular, the method outperforms the F&M method by more than 60% in the number of crossing nets on average.<>
Keywords
VLSI; circuit layout CAD; network topology; VLSI; circuit layout; closely connected cells; clustering; crossing nets; gradual constraint enforcement technique; local minimum problems; near optimum solution; network topology; partitioning; size-constraints; top-down design; Annealing; Circuits; Clustering algorithms; Cost function; Heuristic algorithms; Iterative algorithms; NP-hard problem; Partitioning algorithms; Pins; Very large scale integration;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/92.238449
Filename
238449
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