DocumentCode :
958936
Title :
Circuit-Board Packaging Considerations for Optimum Utilization of Chip Carriers
Author :
Amey, Daniel I. ; Balde, John W.
Author_Institution :
Sperry Univac,Blue Bell, PA
Volume :
3
Issue :
1
fYear :
1980
fDate :
3/1/1980 12:00:00 AM
Firstpage :
105
Lastpage :
110
Abstract :
Effective utilization of large-scale integration (LSI) silicon technology requires efficient packaging of thc non-LSI portions of the circuit. Low density hybrids of four to six chips can be packaged in the same chip carriers as the LSI chips. This not only offers minimal initial costs, but the best chance for subsequent cast reduction as silicon technology permits conversion of the hybrids to chip devices.
Keywords :
Hybrid integrated circuit packaging; Assembly; Ceramics; Costs; Electronic equipment; Electronics packaging; Integrated circuit interconnections; Large scale integration; Packaging machines; Printed circuits; Silicon;
fLanguage :
English
Journal_Title :
Components, Hybrids, and Manufacturing Technology, IEEE Transactions on
Publisher :
ieee
ISSN :
0148-6411
Type :
jour
DOI :
10.1109/TCHMT.1980.1135599
Filename :
1135599
Link To Document :
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