Title :
High-Speed Multiplication Systems
Author :
Kamal, A.A. ; Ghannam, M.A.N.
Author_Institution :
Department of Electronic Engineering, Cairo University, Giza, Cairo, Egypt.
Abstract :
Large-scale scientific computers are characterized by having a high ratio of computing requirements to the input-output requirements. Thus the speed of arithmetic operations should be of prime importance in this group of digital computers. In this note a mathematical formula is derived to determine the multiplication time obtained by each of the known high-speed multiplication techniques. Then a comparative analysis is performed to show the amount of speed improvement resulting from each technique and the influence of the different factors affecting speed.
Keywords :
Adders; Application software; Combinational circuits; Decoding; Digital arithmetic; Logic testing; Multivalued logic; Pattern analysis; Sequential circuits; Test pattern generators; High-speed multiplication; multiplier addition logic; multiplier ternary decoding; multiplier variable shift decoding; registers connection logic;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1972.5009082
