DocumentCode
959819
Title
Influence of the series resistance of on-chip power supply buses on internal device failure after ESD stress [MOS devices]
Author
Terletzki, H. ; Nikutta, W. ; Reczek, W.
Author_Institution
Siemens AG, Munchen, Germany
Volume
40
Issue
11
fYear
1993
fDate
11/1/1993 12:00:00 AM
Firstpage
2081
Lastpage
2083
Abstract
Bus wires of on-chip power supplies are resistive because of their limited width. During an ESD event, this resistance initiates a local internal overvoltage through a high discharge current peak, which can cause damage to internal source/drain areas. A detailed description of the mechanism that causes this internal damage and a simple estimation of the minimum width of power supply buses on semiconductor devices is given. Additional protection circuits for improving the ESD resistivity against internal failure are presented
Keywords
CMOS integrated circuits; electrostatic discharge; failure analysis; insulated gate field effect transistors; overvoltage protection; semiconductor device testing; CMOS; ESD stress; NMOS transistors; high discharge current peak; internal damage; internal device failure; internal source/drain areas; local internal overvoltage; on-chip power supply buses; protection circuits; semiconductor devices; series resistance; Circuits; Electrostatic discharge; Failure analysis; MOS devices; Parasitic capacitance; Power supplies; Protection; Random access memory; Variable structure systems; Voltage control;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.239752
Filename
239752
Link To Document