Title :
A Note on Conditional-Sum Addition for Base - 2 Systems
Author :
Kanani, Dhirubhai V. ; O´Keefe, Kenneth H.
Author_Institution :
Department of Electrical Engineering, University of Washington, Seattle, Wash. 98195.
fDate :
6/1/1973 12:00:00 AM
Abstract :
Conditional-sum addition in a -2 base system and its comparison with normal binary conditional-sum addition is discussed. It is found that approximately 2.0 to 2.5 times as much hardware is required for this high-speed addition method in the negative binary system as compared to the positive binary system.
Keywords :
Adders; Central Processing Unit; Costs; Digital arithmetic; Hardware; Large scale integration; Logic; Modular construction; Pipeline processing; Tellurium; Base-2 arithmetic; conditional-sum method; fast adder; negative radix;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1973.5009117
