DocumentCode
960488
Title
A new quantum dot transistor
Author
Wang, Yannan ; Chou, Stephen Y.
Author_Institution
Dept. of Electr. Eng., Minnesota Univ., Minneapolis, MN
Volume
40
Issue
11
fYear
1993
fDate
11/1/1993 12:00:00 AM
Firstpage
2136
Abstract
Summary form only given. The authors propose and demonstrate a novel quantum dot transistor (QDT), which consists of a nanoscale dot-gate inside the gap of a split-gate. The dot-gate consists of an 80-nm-diameter metal dot in the middle of a 30-nm-wide metal wire; when positively biased, the gate creates a quantum box connected by two 1D wires beneath the gate. The negatively biased split-gate is used to change the Fermi level and therefore the electron concentration in the quantum box. The gates are fabricated on top of a δ-doped AlGaAs/GaAs heterostructure using electron-beam lithography followed by a lift-off of Ti/Au. As the dot-gate voltage was scanned from 0 to 160 mV with the split-gate voltage fixed at -0.5 V, four distinct oscillation peaks appeared in drain current at T =0.5 K
Keywords
Fermi level; III-V semiconductors; aluminium compounds; electron beam lithography; field effect transistors; gallium arsenide; semiconductor quantum dots; -0.5 V; 0 to 160 mV; 1D wires; AlGaAs-GaAs; Fermi level; drain current; electron concentration; electron-beam lithography; lift-off; metal dot; metal wire; nanoscale dot-gate; negatively biased split-gate; oscillation peaks; quantum box; quantum dot transistor; Data structures; Electrons; Energy states; Gallium arsenide; Quantum dots; Split gate flash memory cells; Temperature; Tunneling; US Department of Transportation; Voltage;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.239820
Filename
239820
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