Flip-Flops for Multiple-Valued Logic

A family of multiple-valued (MV) electronic memory elements, referred to herein as flip-flops, is presented along with a system of MV algebra upon which they are based. These MV flip-flops are compared to binary flip-flops. MV asynchronous set-clear flip-flops and synchronous set-clear, D-type, JK, and modulo N counter flip-flops are presented, their next-state equations are derived, and they are shown to have desirable properties for use in MV sequential circuits. Experimental results and schematic diagrams are presented for a level restoring three-valued logic gate, the clocked set-clear flip-flop, and an example synchronous sequential circuit.